8087 NDP COPROCESSOR PDF

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The Numeric Data Processor is a coprocessor that performs arithmetic and comparison operations on a variety of numeric data types; it also executes numerous built-in transcendental functions e.

As a coprocessor to a maximum mode or , the NDP effectively extends the register and instruction sets of the host CPU and adds several new data types as well. The programmer generally does not perceive the as a separate device; instead, the computational capabilities of the CPU appear greatly expanded. These routines perform arithmetic and limited standard functions on single precision bit real numbers; an FPAL multiply executes in about 1.

The accepts double precision bit operands as well as single precision numbers. The intent of the standard is to promote portability of numeric programs between computers and to provide a uniform programming environment that encourages the development of accurate, reliable software.

The proposed standard specifies requirements and options for number formats as well as the results of computations on these numbers.

The floating point number formats are identical to those previously adopted by Intel and used in the products described in this section. Coonen, W. Kahan, J. Palmer, T. Pittman, D. It is a single-chip hardware implementation of the proposed IEEE standard, including all its options for single and double precision numbers.

As such, it is compatible with previous Intel numerics products; programs written for the will be transportable to future products that conform to the proposed IEEE standard. The NDP also provides many additional functions that are extensions to the proposed standard. Of course, the actual performance of the NDP in a given system depends on numerous application-specific factors.

Table S-1 compares the execution times of several instructions with the equivalent operations executed in software on a 5 MHz The software equivalents are highly optimized assembly language procedures from the emulator, an NDP development tool discussed later in this section. The performance figures quoted in this section are for operations on real floating point numbers.

The also has instructions that enable it to utilize fixed point binary and decimal integers of up to 64 bits and 18 digits, respectively. Using an , rather than multiple precision software algorithms for integer operations, can provide speed improvements of times.

No overhead is incurred in setting up the device for a computation; the decodes its own instructions automatically in parallel with the CPU. Moreover, built-in coordination facilities allow the CPU to proceed with other instructions while the is simultaneously executing its numeric instruction.

Programs can exploit this processor parallelism to increase total system throughput. Viewed strictly from the standpoint of raw speed, the enables serious computation-intensive tasks to be performed by microprocessors for the first time. The offers more than just high performance, however. By synthesizing advances made by numerical analysts in the past several years, the NDP provides a level of usability that surpasses existing minicomputer and mainframe arithmetic units.

In fact, the charter of the design team was first to achieve exceptional functionality and then to obtain high performance.

For example, most computers can overflow when two single precision floating point numbers are multiplied together and then divided by a third, even if the final result is a perfectly valid bit number. The delivers the correctly rounded result.

Other typical examples of undesirable machine behavior in straightforward calculations occur when solving for the roots of a quadratic equation:. Straightforward algorithms will not deliver consistently correct results and will not indicate when they are incorrect on most machines. To obtain correct results on traditional machines under all conditions usually requires sophisticated numerical techniques that are foreign to most programmers.

General application programmers using straight-forward algorithms will produce much more reliable programs on the This simple fact greatly reduces the software investment required to develop safe, accurate computation-based products.

Exact arithmetic is vital in accounting applications where rounding errors may introduce money losses that cannot be reconciled. The NDP contains a number of facilities that can optionally be invoked by sophisticated users. Examples of these advanced features include two models of infinity, directed rounding, gradual underflow, and traps to user-written exception handling software.

The combination of an or CPU and an generally appears to the programmer as a single machine. The , in effect, adds new data types, registers, and instructions to the CPU. The programming languages and the coprocessor architecture take care of most interprocessor coordination automatically.

Table S-2 lists the seven data types. The fact that these conversions are made, and that calculations may be performed on converted numbers, is transparent to the programmer. Integer operands, whether binary or decimal, yield correct integer results, just as real operands yield correct real results.

Moreover, a rounding error does not occur when a number in an external format is converted to temporary real. These eight bit registers provide the equivalent capacity of 40 of the bit registers found in typical CPUs.

This generous register space allows more constants and intermediate results to be held in registers during calculations, reducing memory access and consequently improving execution speed as well as bus availability.

The register set is unique in that it can be accessed both as a stack, with instructions operating implicitly on the top one or two stack elements, and as a fixed register set, with instructions operating on explicitly designated registers. A8M provides directives for defining all data types and mnemonics for all instructions.

The fact that some instructions in a program are executed by the and others by the CPU is usually of no concern to the programmer. Two features of the hardware further simplify numeric application programming. Second, the NDP automatically detects exception conditions that can potentially damage a calculation at run-time. On-chip exception handlers are automatically invoked by default to field these exceptions so that a reasonable result is produced and execution may proceed without program intervention.

Alternatively, the can interrupt the CPU and thus trap to a user procedure when an exception is detected. Besides the assembler and compiler, Intel provides a software emulator for the The emulator E is a software package that provides the functional equivalent of an ; it executes entirely on an or CPU. At the source code level, there is no difference between a routine that will ultimately run on an or on a CPU emulation of an At link time, the decision is made whether to use the NDP or the software emulator; no re-compilation or re-assembly is necessary.

As a coprocessor to an or , the is wired directly to the CPU. When it is in control of the bus, the relinquishes the bus at the end of the current bus cycle upon a request from the connected IOP, giving the IOP higher priority than itself.

All processors utilize the same clock generator and system bus interface components bus controller, latches, transceivers, and bus arbiter.

Thus, no additional hardware beyond the is required to add powerful computational capabilities to an or based system. In essence, the NEU executes all numeric instructions, while the CU fetches instructions, reads and writes memory operands, and executes the processor control class of instructions. The two elements are able to operate independently of one another, allowing the CU to maintain synchronization with the CPU while the NEU executes numeric instructions.

By monitoring the status signals emitted by the CPU, the NDP control unit can determine when an instruction is being fetched. When the instruction byte or word becomes available on the local bus, the CU taps the bus in parallel with the CPU and obtains that portion of the instruction. In effect, both processors fetch and decode the instruction stream in parallel. The two processors execute the instruction stream differently, however. The first five bits of all machine instructions are identical; these bits designate the coprocessor escape ESC class of instructions.

The control unit ignores all instructions that do not match these bits, since these instructions are directed to the CPU only. When the CU decodes an instruction containing the escape code, it either executes the instruction itself, or passes it to the NEU, depending on the type of instruction. This is a normal read cycle, except that the CPU ignores the data it receives.

A given instruction an ESC to the CPU will either require loading an operand from memory into the , or will require storing an operand from the into memory, or will not reference memory at all. If the instruction is an load, the CU additionally captures the first and possibly only word of the operand when it becomes available on the bus.

If the operand to be loaded is longer than one word, the CU immediately obtains the bus from the CPU and reads the rest of the operand in consecutive bus cycles.

When the is ready to perform the store, the CU obtains the bus from the CPU and writes the operand at the saved address using as many consecutive bus cycles as are necessary to store the operand.

The NEU executes all instructions that involve the register stack; these include arithmetic, comparison, transcendental, constant, and data transfer instructions. The data path in the NEU is 68 bits wide and allows internal operand transfers to be performed at very high speeds. Section S. At a given point in time, the ST field in the status word described shortly identifies the current top-of-stack register.

A store-and-pop operation stores the value from the current top register and then increments ST by 1. Instructions may address registers either implicitly or explicitly. Many instructions operate on the register at the top of the stack. These instructions implicitly address the register pointed to by ST. For example, the ASM instruction FSQRT replaces the number at the top of the stack with its square root; this instruction takes no operands because the top-of-stack register is implied as the operand.

Other instructions allow the programmer to explicitly specify the register that is to be used. For example, if ST contains O11B register 3 is the top of the stack , the following instruction would add registers 3 and The fixed registers are used like the conventional registers in a CPU, to hold constants, accumulations, etc. The adjustable group is used like a stack, with operands pushed on and results popped off.

After loading, the registers in the fixed group are addressed explicitly, while those in the adjustable group are addressed implicitly. The stack organization and top-relative addressing of the registers simplify subroutine programming. So long as the stack is not full, each routine simply loads the parameters on the stack and calls the subroutine.

The subroutine addresses the parameters as ST, ST l , etc. The status word reflects the overall condition of the ; it may be examined by storing it into memory with an NDP instruction and then inspecting it with CPU code.

The status word is divided into the fields shown in figure S Several instructions for example, the comparison instructions post their results to the condition code bits 14 and of the status word. The principal use of the condition code is for conditional branching. This may be accomplished by executing an instruction that sets the condition code, storing the status word in memory and then examining the condition code with CPU instructions.

Bits of the status word point to the register that is the current stack top ST.

ALM 12V7 PDF

8087 Numeric Data Processor

The Intel , announced in , was the first x87 floating-point coprocessor for the line of microprocessors. The purpose of the was to speed up computations for floating-point arithmetic, such as addition , subtraction , multiplication , division , and square root. It also computed transcendental functions such as exponential , logarithmic or trigonometric calculations, and besides floating-point it could also operate on large binary and decimal integers. The was an advanced IC for its time, pushing the limits of manufacturing technology of the period. Initial yields were extremely low.

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